Achronix adopts eMemory IP for FPGA Hardware Root of Trust

Update: May 1, 2021

Achronix adopts eMemory IP for FPGA Hardware Root of Trust

Achronix adopts eMemory IP for FPGA Hardware Root of Trust

eMemory, a provider of NVM IP to the Semiconductor industry, has partnered with FPGA developer Achronix to enhance security at the semiconductor chip level.

eMemory, now a member of the Achronix Partner Program, will offer its NeoFuse and NeoPUF IP to strengthen the Achronix portfolio and provide a robust hardware root of trust to ensure the silicon and FPGA configurations are authentic and secure against data breaches and chip counterfeiting.

NeoFuse is an antifuse-based, one-time programmable (OTP) memory that is both a reliable and secure embedded solution. In addition, the IP achieves high yields at advanced and more-than-Moore technology nodes. NeoPUF is a hardware security technology based on physical unclonable variations occurring in silicon manufacturing processes. The random numbers generated from NeoPUF technology create unique silicon fingerprints for chips that can be used for identification, authentication and encryption.

“Companies building solutions with FPGAs often put their most valuable IP into configuration files that are loaded onto the FPGAs,” explained Chris Pelosi, Vice President of Hardware Engineering at Achronix. “The adoption of eMemory’s technology enables us to provide a hardware root of trust to ensure Achronix’s Speedster7t FPGAs are secured and their configurations are authentic and securely encrypted.”

PUF-based key encryption and management functions are seen as the best way to protect software and hardware from malicious attacks or illegitimate cloning.

NeoFuse and NeoPUF can be constructed as a strong hardware root of trust for security applications including key provision, authentication, secure boot and data encryption in an FPGA system. The integration of NeoFuse and NeoPUF within Achronix Speedster7t FPGAs is a critical part of the overall secure solution that Achronix has implemented in their FPGA products.