Analogue programmability

When you look at the success of the field-programmable gate array (FPGA) in capturing a wide range of designs where flexibility counts more than volume price, the attraction to do the same for analogue makes a lot of sense.

But the analogue cousin of the FPGA has faced more of a struggle.

Conceptually, the field-programmable analogue array (FPAA) is only a little younger than its logic-oriented big brother: the first proposals from researchers appeared in the late 1980s, with work at two independent groups, one at Caltech and the other at the University of Southern California. Since then the concept has been tried commercially though with mixed results. The most famous proponent has been Anadigm, which started as a spinout from glassmaker Pilkington mid-1990s before being acquired by Motorola and again being spun out as a company based near the Semiconductor company’s Arizona fabs.

For its parts Anadigm chose a switched-capacitor implementation, which was already a technique used in the design of ASICs to add analogue functions cost effectively to a predominantly digital process. Switching capacitor-based circuits on and off rapidly provides the ability to build Resistor networks that are more accurate than physical CMOS resistors and useable as long as the signal bandwidth is below the switching rate. The somewhat younger start-up Okika Technologies has similarly chosen a switched-capacitor approach for tuning the parameters of on-chip amplifier modules and I/O cells that are provided alongside digital lookup tables for control.

A key issue for companies selling FPAAs is the tension between the need for small size and flexibility versus cost and performance in an environment where discrete analogue circuitry, even with highly specific functions, is plentiful and often inexpensive.

Andrea Riverso, head of product management for semiconductors at distributor Farnell, says users with a need for fast prototyping or working on research applications are likely to benefit more from programmable-analogue parts. Once a requirement becomes specific, it can be more cost-effective to develop a hardwired implementation and still be able to add some level of programmability, possibly by switching some elements in and out of the circuit.

A key question is how much in-field flexibility is needed. An FPAA can make sense if there is need to cater for different sensor inputs and to tune how their signals are conditioned. For example, the interface might need to implement a variety of filters to cope with different input types. But this is a situation where full programmability may not be the most cost-effective option. Some vendors have developed with specific applications in mind that have more limited configurability.

FPAA examples

An example is Analog Devices’ SWIO product line, which uses on-chip, sometimes with the help of external passives, to let a variety of sensor interfaces and instruments that signal using 4-20mA current loops to feed data to its digital processor. According to Analog, the driving force for their SWIO product line is a transition to Ethernet that the industrial automation industry is going through.

On one side, companies that need to support legacy analogue instrumentation are trying to reduce the number of platforms they need to support. Having a single board design that is able to cater for the wide variety of sensor interfaces could save millions of dollars in development in situations where vendors have to support tens of different I/O combinations. A second driver is the Ethernet transition itself, by allowing factory owners to keep 4-20mA instruments in place but have them talk to systems using the digital network. Equipment makers can, in principle, provide a single configurable module to support the changeover.

Maxim Integrated’s PIXI family was developed originally to provide a way to bias the power amplifiers in wireless transceiver designs to help overcome the inventory problem that sector has with the sheer range of radio bands in use around the world. In addition to dedicated temperature sensors, parts such as the MAX11300 employ onchip ADCs and DACs multiplexed across a number of channels to measure and generate different voltages.

Dialog Semiconductor’s GreenPak offers a combination of digital sequencing and real-time analogue programmability with the provision of on-chip op-amps and rheostats combined with digital lookup tables. The parts are designed to be able to enable and disable analogue macrocells so that the analogue interfaces are only active and drawing power when needed. The PSoC developed by Cypress Semiconductor, which is now part of Infineon Technologies, couples its programmable-analogue macrocells to a microcontroller to support more complex control scenarios.

Professor Jennifer Hasler of the Georgia Institute of Technology argues that though some numerical analysis methods, there are functions that analogue circuitry can potentially do far more efficiently

Changing systems design

One argument for programmable analogue finally beginning to break out is not so much a desire to cut inventory for designs like industrial sensors but a change in systems design, led by the currently fashionable technology of machine learning. Most machine learning algorithms use some kind of linear algebra for numerical analysis, whether it’s for gradient descent in neuron networks or some other kind of iterative optimisation.

Professor Jennifer Hasler of the Georgia Institute of Technology argues that though some numerical analysis methods, such as matrix factorisation are far easier on digital hardware, there are functions that analogue circuitry can potentially do far more efficiently. They include optimisation and differentiation. Early analogue computers were called upon to do those jobs to handle control loops in the absence of fast digital computers.

Though digital logic still has an advantage in terms of speed and density for most jobs, analogue computing has the potential to leap ahead in terms of energy efficiency, at least for the right jobs. In one experiment by Hasler’s group, an FPAA was able to recognise command words in speech, taking just 1µJ per inference, or about a thousand times less than similar digital implementations. The FPAA implemented a bank of bandpass filters that were used for feature extraction, feeding into a simple machine-learning algorithm based on an analogue matrix multiplier and a winner-take-all classifier that converted spectral inputs into a few selected symbols.

Now in its third generation, the Georgia Tech RASP work started as blocks of sub-circuits that could be combined in different ways using capacitance in a different way to the switched-capacitor implementations. Here the capacitance being exploited is in the floating gates of transistors developed for non-volatile memory. These are not new to FPGAs. Microsemi’s devices have exploited this technology for some though most other FPGAs use SRAM cells to program the connections between configurable elements as well as the entries in their core lookup tables but can only reliably hold digital values. Floating-gate switches on the other hand are capable of holding analogue values, though with limited resolution and accuracy.

The most recent form of the Georgia Tech work implements 600,000 programmable parameters using a relatively old 350nm CMOS process. The floating gates can perform double duties in that many of them are used in the routing fabric but can be programmed to be partially on and so adjust the signal levels that reach destination blocks. Similar to the approach used in analogue AI devices such as those made by Mythic, the analogue nature of the interconnect matrix lets it perform tasks such as matrix multiplication simply by mixing input signals at crosspoints.

Start-up Aspinity has taken a more explicit approach to applying analogue circuitry to machine learning. Its RAMP device uses analogue circuitry operating in the subthreshold regime to save power with the aim of implementing neuromorphic functions. Whereas the Mythic architecture focuses squarely on analogue matrix arithmetic, the Aspinity AnalogML cores include interface functions to connect to sensors and other input devices and blocks that can be configured to perform feature extraction before passing the results to an inferencing core.

Some three decades on from the first FPAAs being proposed, programmability is steadily making its way into analogue. A combination of industrial renovation and the adoption of machine learning in low-power devices may push it into the mainstream as dynamic flexibility becomes more of a requirement.