Andes embedded SoC shipments hit 2bn in 2020

Andes Technology, a supplier of high efficiency, low-power 32/64-bit RISC-V processor cores, has reported record annual shipments of 2 billion SoCs containing its CPU IPs in 2020.

That figure represents an annual growth rate of 33 per cent and cumulative shipments have now surpassed 7 billion.

Applications of SoCs in which Andes CPU IPs are embedded include audio, Bluetooth, gaming, GPS, machine learning, MCU, sensor fusion, SSD controllers, touch screen and TDDI controllers, storage device, voice recognition, and wireless chargers.

“Most of the 2 billion shipments in 2020 are Andes processors of the third generation architecture (V3), but Andes’ RISC-V series IPs launched in 2017 have started to contribute royalties as well,” said Frankwell Lin, CEO of Andes Technology.

“While the proportion of royalties from our RISC-V cores is still low, with the momentum of our RISC-V core licensing, we believe they will grow to dominate our royalties and become a significant part of our revenue in a much faster pace than our V3 processors. Also, Andes has continued to devote itself to contributing the RISC-V community by playing a leading role in the Board and Technical Steering Committee of the RISC-V International to influence RISC-V technical planning, business strategy, and ecosystem development.”

“According to the latest forecast for 2021 from Semico Research, the CAGR for RISC-V cores between 2020 and 2025 is expected to reach 115%.

According to Charlie Su, President and CTO of Andes Technology, “The key advantages of RISC-V are modularity, extensibility and compactness. They help drive the diversified applications of Andes’ customers, ranging from using only one core to over 1,000 cores on a single chip, including 5G, AI/machine learning, ADAS, AR/VR, blockchain, cloud computing, data centre, IoT, sensing, storage, security, wireless and so on.

“As the leading RISC-V processor IP provider, Andes has launched a variety of RISC-V CPU cores, which are flexible with high performance efficiency and low power consumption in design.”