Astera Labs introduced the industry’s first CXL™ 2.0 Memory Accelerator SoC Platform

Update: November 24, 2021

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Astera Labs, a pioneer in intelligent system connectivity solutions, recently announced the launch of a new Leo Memory Accelerator Platform for Compute Express Link (CXL) 1.1/2.0 interconnection, which enables powerful decomposition of processors, workload accelerators, and smart I/O devices Memory pooling and expansion. Leo solves the processor’s memory bandwidth bottlenecks and capacity limitations, while providing built-in Fleet Management and in-depth diagnostic functions that are essential for large-scale enterprise and cloud server deployment.

Jitendra Mohan, CEO of Astera labs, said: “CXL is a true disruptor of hyperscale data centers. It provides memory expansion and pooling capabilities to support the new era of data-centric composable computing infrastructure. We work with leading Processor vendors, system OEMs, and strategic cloud customers have simultaneously developed the Leo SoC platform to launch next-generation memory interconnect solutions.”

CXL is a basic standard and has proven to be a key enabler for the realization of the cloud AI vision. Astera Labs has made an impressive contribution to this exciting technology and is working with major industry leaders to develop CXL technology to accelerate the development and deployment of a strong ecosystem.

Jim Pappas, Director of Intel Technology Programs, said: “The launch of CXL has laid an important foundation for the establishment of a unified and coherent memory space between the CPU and the accelerator. This innovation will completely change the way data center server architecture is built in the next few years. Astera Labs’ Leo CXL Memory Accelerator Platform is an important driving factor for the Intel ecosystem to achieve shared memory space between the host and auxiliary devices.”

As the industry’s first CXL SoC solution that implements the CXL.memory (CXL.mem) protocol, Leo CXL Memory Accelerator Platform supports CPU access and management of CXL’s additional DRAM and persistent memory, so that it can be large-scale and efficient without affecting performance Utilize centralized memory resources.

AMD Customer Compatibility Director Michael Hall said: “AMD recognizes the great value that CXL brings to heterogeneous computing and can use resource decomposition to meet industry needs for increasing computing capacity and speeding up data processing. Like Leo Memory Accelerator Platform from Astera Labs Solutions like this are critical to achieving tighter coupling between AMD processors, accelerators, and memory extensions.”

The Leo Platform, composed of IC and hardware, increases the overall memory bandwidth by 32 GT/s/Lane, increases the capacity by up to 2TB, while maintaining ultra-low latency, and provides server-level RAS functions to achieve powerful and reliable cloud-scale operations .

John DaCosta, Senior Director of Arm’s Strategic Segments, said: “In order to continue to promote the rapid growth of heterogeneous computing, we need to remove some barriers, such as cross-business, hyper-scale enterprise, storage and accelerator applications to expand memory and achieve high-speed interconnection. Cost. Arm believes that CXL is an important driving force in this field, and Astera Labs’ new platform helps to take advantage of Arm-based® Technology to solve these needs of cloud and edge computing data centers. “

Astera Labs continues to drive the next wave of ultra-large-scale data center innovation with its unparalleled CXL connectivity expertise and focus on seamless ecosystem interoperability.

Barry McAuliffe, President of CXL Consortium, said: “Astera Labs has always been an important member of the CXL Consortium and has contributed its expertise in realizing the connection of heterogeneous computing architectures. We are very pleased to see Astera Labs launch its first CXL memory expansion and pooling. Solutions to provide support for the rapidly expanding CXL ecosystem.”

Based on the success achieved on Aries CXL Smart Retimers, Leo CXL Memory Accelerator Platform extends Astera Labs’ solution series and unleashes the true potential of CXL interconnects. The company’s breakthrough solutions portfolio now includes a number of outstanding product series, which can establish connections for modern data-centric systems based on complex heterogeneous computing architectures and composable decomposition topologies.