Cadence accelerates intelligent SoC development

Cadence accelerates intelligent SoC development

Cadence accelerates intelligent SoC development

Cadence Design Systems has released the Tensilica AI Platform for accelerating AI SoC development.

Together with three supporting product families optimised for varying data and on-device AI requirements, the Tensilica AI Platform can deliver scalable and energy-efficient on-device to edge AI processing for AI SoCs.

A companion AI neural network engine (NNE) consumes 80% less energy per inference and delivers more than 4X TOPS/W compared to standalone Tensilica DSPs, while neural network accelerators (NNAs) deliver enhanced AI performance and energy efficiency in a turnkey solution.

Targeting intelligent sensor, internet of things (IoT) audio, mobile vision/voice AI, IoT vision and advanced driver assistance systems (ADAS) applications, the platform is able to deliver optimal power, performance and area (PPA) and scalability with a common software platform.

Built upon the application-specific Tensilica DSPs already shipping in volume production in AI SoCs for the consumer, mobile, automotive and industrial markets, the Tensilica AI Platform product families include:

  • AI Base: Includes the Tensilica HiFi DSPs for audio/voice, Vision DSPs, and ConnX DSPs for radar/lidar and communications, combined with AI instruction-set architecture (ISA) extensions.
  • AI Boost: Adds a companion NNE, initially the Tensilica NNE 110 AI engine, which scales from 64 to 256 GOPS and provides concurrent signal processing and efficient inferencing.
  • AI Max: Encompasses the Tensilica NNA 1xx AI accelerator family – currently including the Tensilica NNA 110 accelerator and the NNA 120, NNA 140 and NNA 180 multi-core accelerator options – which integrates the AI Base and AI Boost technology. The multi-core NNA accelerators can scale up to 32 TOPS, while future NNA products are targeted to scale to 100s of TOPS.

All of the NNE and NNA products include random sparse compute to improve performance, run-time tensor compression to decrease memory bandwidth, and pruning plus clustering to reduce model size.

Comprehensive common AI software addresses all target applications, streamlining product development and enabling easy migration as design requirements evolve.

The software includes the Tensilica Neural Network Compiler, which supports: TensorFlow, ONNX, PyTorch, Caffe2, TensorFlowLite and MXNet for automated end-to-end code generation; Android Neural Network Compiler; TFLite Delegates for real-time execution; and TensorFlow Lite Micro for microcontroller-class devices.

“AI SoC developers are challenged to get to market faster with cost-effective, differentiated products offering longer battery life and scalable performance,” said Sanjive Agarwala, corporate vice president and general manager of the IP Group at Cadence. “With our mature, extensible and configurable platform based on our Tensilica DSPs and featuring common AI software, Cadence allows AI SoC developers to minimise development costs and meet tight market windows.”