Cadence collaboration with Arm enables tape-out of next-generation mobile designs

Cadence Design Systems has announced that a collaboration with Arm has enabled customers to successfully tape-out next-generation Arm mobile designs.

According to Cadence, customers have successfully taped out mobile SoCs using its tools for the next-generation Arm mobile solution, which includes the Arm Cortex-X2, Cortex-A710, and Cortex-A510 CPUs, Mali-G710 GPU and the DynamIQ Shared Unit-110.

As part of the collaboration, Cadence has fine-tuned its digital and verification full flows on 5nm and 7nm process technologies to drive adoption of the new Arm mobile solution on the Armv9 architecture. In addition, Cadence delivered 5nm and 7nm RTL-to-GDS digital flow Rapid Adoption Kits (RAKs) to enable customers to achieve optimal power, performance and area (PPA) and accelerate time to tape-out.

Cadence was able to deliver a highly tuned digital flow and corresponding 5nm and 7nm RAKs for the development of SoCs. The complete, integrated RTL-to-GDS RAKs include the Cadence Modus DFT Software Solution, Genus Synthesis Solution, Innovus Implementation System, Quantus Extraction Solution, Tempus Timing Signoff Solution and ECO Option, Voltus IC Power Integrity Solution, Conformal Equivalence Checking and Conformal Low Power.

The digital full flow offers Arm mobile solution adopters several capabilities to improve productivity. For example, the Cadence iSpatial technology provides an integrated, predictable implementation flow so users can achieve faster design closure. It also incorporates an innovative hierarchical technology to deliver optimal turnaround time on large high-performance CPUs.

Cadence has also optimised its System-Level Verification IP (System VIP) and verification full flow to support the latest Arm AMBA protocols, enabling the rapid and dependable adoption of Armv9 IP while accelerating integration and functional signoff of Arm mobile SoCs.

Cadence System VIP extensions for Armv9 include new checkers, verification plans and traffic generators to efficiently verify Arm mobile SoC coherency, performance and Arm SystemReady compliance.

“Cadence has collaborated with Arm on many generations of CPUs and GPUs for mobile IP development, and our latest work expands our support for the recently introduced Armv9 architecture,” said Dr. Chin-Chi Teng, senior vice president and general manager, Digital & Signoff Group at Cadence. “Arm uses our Cadence digital and verification full flow innovations to develop its mobile IP, and with the rollout of Arm’s new CPUs and CPUs, we’re enabling customers to achieve PPA targets to accelerate time to tape-out and providing SystemReady verification and early software bring-up.”