Design of Frequency Characteristic Tester Based on DDS and FPGA

Frequency characteristics are the response characteristics of a system (or component) to sinusoidal input signals of different frequencies. As shown in Figure 1, the input of the system under test is a sinusoidal signal with an amplitude of Ar and an angular frequency of ω. If the system is linear, its steady-state output is also a sinusoidal signal with a constant frequency of ω and an amplitude of Ac. The angular difference is φ. Changing ω can get a series of input and output data.

1 Introduction

Frequency characteristics are the response characteristics of a system (or component) to sinusoidal input signals of different frequencies. As shown in Figure 1, the input of the system under test is a sinusoidal signal with an amplitude of Ar and an angular frequency of ω. If the system is linear, its steady-state output is also a sinusoidal signal with a constant frequency of ω and an amplitude of Ac. The angular difference is φ. Changing ω can get a series of input and output data. The output-to-input amplitude ratio A(ω)=Ac/Ar and the relationship curve of ω is called the amplitude-frequency characteristic of the system, and usually 20 lg A(ω) is called the logarithmic amplitude-frequency characteristic. The relationship between the output-to-input phase angle difference φ(ω) and ω is called the phase-frequency characteristic of the system. The combination of amplitude-frequency characteristics and phase-frequency characteristics is called frequency characteristics, and the commonly used open-loop frequency characteristics of the system are Bode plots.

The frequency characteristic of a system can be determined by a frequency characteristic tester. Frequency characteristic tester, also called frequency sweeper, is used to test the amplitude-frequency characteristic of the network under test. It can measure the resonant frequency, bandwidth, out-of-band attenuation, gain, etc. of the network under test, and is one of the commonly used devices in the field of electronics. The analog frequency sweeper is more expensive, and cannot directly obtain the phase-frequency characteristics, let alone save the frequency characteristic diagram and print the frequency characteristic diagram, which brings a lot of inconvenience to the user. Therefore, this digital frequency characteristic tester is not included. .

2. Overall design

The single-chip microcomputer controls the signal source to generate a standard sine wave, which is input to the network under test; the output of the network under test is input to the amplitude detection circuit and the phase detection circuit respectively, and the peak value and phase difference value are obtained and sent to the single-chip microcomputer for processing; the results of the single-chip processing are provided on the one hand. Real-time Display to the LED, on the other hand, it is stored in the memory for the oscilloscope to display the amplitude-frequency and phase-frequency curves. The overall frame is shown in Figure 2.

2.1 Design of frequency sweep signal source

The frequency sweep signal generator is the core of the frequency characteristic tester. It provides a sinusoidal signal whose frequency changes periodically within a certain range over time for the input of the network under test. The methods of frequency sweep signal generation include phase-locked loop (PLL) and preset frequency divider, monolithic integrated waveform generator, special frequency synthesis device and direct digital frequency synthesis (DDS) circuit. The system is controlled by single chip microcomputer, uses EDA technology, and selects the system programmable logic device ispCPLD chip to form a direct digital frequency synthesizer (DDS) to generate scanning sine waves.

Direct Digital Frequency Synthesis (DDS) is a purely digital method. Because DDS has ultra-high-speed frequency conversion time, extremely high frequency resolution and low phase noise, DDS devices can maintain phase continuity during frequency change and frequency modulation, so it is easy to achieve frequency, phase and amplitude modulation. In addition, DDS also has the outstanding advantage of programmable control. DDS is mainly composed of phase accumulator, sinusoidal ROM table and digital-to-analog converter, etc. Its core is the phase accumulator, which is composed of an N-bit word-length binary adder and an N-bit register with clock fclk sampling. Linearly accumulate the frequency control word. When the phase increment is 1 and the word width of the accumulator is 32 bits, the phase resolution of the output address corresponding to the waveform is l/232. A sine function look-up table is stored in the sine ROM table, which outputs different amplitude codes corresponding to different instantaneous phase codes. When working, write the control word into the phase accumulator and convert it into an instantaneous phase. Under the action of the external reference clock, the phase accumulator accumulates the phase step once per clock cycle, and the corresponding amplitude code is output to the digital-to-analog converter. (D/A), the digital quantity is converted into an analog quantity, and then the final required signal is obtained after smoothing through a low-pass filter. And the analog sine wave is compared with a threshold voltage to obtain a square wave clock signal of the same frequency. He stores the amplitude digital quantity of the discrete sample points of the required sine wave in one cycle into the ROM, and then presses a certain address interval ( Phase increment) is read out, and an analog sinusoidal signal is formed by a D/A converter, and then a sinusoidal signal with better quality is obtained by a low-pass filter.

The frequency f0 of the output waveform of the signal generator is defined as:

Where fc is the crystal frequency, k is the frequency division ratio, N is the number of bits of the phase accumulator, and M is the increment (step size) of the phase accumulator.
In this design, take fc=32.768 MHz, k=50, N=16, and substitute it into the above formula to get:

In this way, as long as the value of M is controlled, the requirement of frequency step of 10Hz can be accurately realized. Here the clock frequency is:

In the formula, △phase is the frequency control word, sysclk is the system clock, clkin is the input reference clock frequency of the DDS, N is the number of bits in the frequency register, and M is the number of bits in the phase offset register. The frequency control word △phase determines the frequency value of the output signal; the minimum frequency resolution is determined by the number of bits N in the frequency register, the larger the N, the higher the frequency resolution; the phase resolution is determined by the number of bits in the phase offset register, and the amplitude Resolution is determined by the precision of the D/A converter.

2.2 Amplitude-frequency and phase-frequency characteristic design

The amplitude-frequency characteristic test circuit is composed of a peak detector and a D/A converter. The peak detector consists of an “op amp” and a detector diode. As shown in Figure 3. He detected the peak value of the output signal of the network under test (representing the network amplitude-frequency law), sent it to the 8-bit ADC0809 analog-to-digital converter, and then sent it to the single-chip AT89C51 for processing after digitization.

The commonly used detection methods in the amplitude-frequency characteristic test are peak detection and RMS detection. However, since the RMS detection cannot meet the frequency variation range of 500 Hz to 10 kHz as required by the design, peak detection is used. The active peak detector is used to realize the peak value measurement. The peak detector detects the peak value of the input and output signals of the network under test, and then sends it to the A/D converter to complete the quantization. In fact, since the characteristics of the D/A and low-pass filter of the signal source can ensure that the amplitude remains unchanged in the range of 100 Hz to 100 kHz, one peak detector and A/D can be omitted, and only the The output signal of the network under test.

The phase-frequency characteristic test circuit (the block diagram is shown in Figure 4) consists of two zero-crossing comparators, a phase detector, a low-pass filter and an A/D converter. The two comparators are zero-crossing signal comparators composed of “op amps”, which respectively convert the input and output sinusoidal signals of the network under test into digital signals.

The phase detector is realized by ETESTER. The phase difference signal of the input and output signals of the network under test is detected by phase detection, and the phase shift signal of the network under test is obtained after filtering by a low-pass filter, which is sent to ADC0809 for analog-to-digital conversion into digital quantity, and then sent to the microcontroller for processing. The duty cycle of the pulse signal output by the phase detector is proportional to the phase difference between the two signals, namely:

Phase difference=N1/(N1+N2)×360°

Among them, N1 is the count value within the high-level pulse width time, and N2 is the count value within the low-level pulse width time. After two clock signals PA and PB with the same frequency and different phases pass through the phase detector epd, one pulse waveform with different duty ratios will be output. Its frequency is the same as the input frequency, and the duty cycle is related to the timing of the rising edge of the PA and PB signals. The pulse width of epd is equal to the time difference between the rising edges of the PB and PA signals. This time difference is PB, which is exactly equal to the duty cycle of epd multiplied by 360°.

2.3 Display and printing of frequency characteristics

There are two display modes in the design of the frequency characteristic tester, one is to display the numerical value by LED, which can be printed out; the other is to display the frequency characteristic curve with an oscilloscope. The printing method we refer to is to design an RS 232 serial port in the system, use the serial port function of the MCU to communicate with the single-chip AT89C51, and use the printing control function of the PC to complete the printing.

A general oscilloscope inputs an analog voltage signal, that is, the measured amplitude-frequency characteristic and phase-frequency characteristic data are converted into analog voltage by D/A. Because the single-channel oscilloscope is used to display the amplitude-frequency and phase-frequency curves, the two curves can be displayed at different positions on the Screen in time division. In order to facilitate observation, when the output amplitude-frequency characteristic data is displayed on the top of the screen, a positive voltage can be superimposed on the output of D/A. Due to the fast scanning speed of the oscilloscope, the two curves of phase-frequency and amplitude-frequency appear to be displayed at the same time. on the screen.

3. Conclusion

The volume of the system is small, because the single-chip microcomputer selected is AT89C51, and the program of the single-chip microcomputer system is short, so there is no need to expand EPROM and RAM. In addition, since the DDS integrated circuit is used to generate the frequency sweep signal, the quality of the frequency sweep signal is high and the frequency sweep range is wide. However, because the system uses the point-frequency method to measure the frequency characteristics of the network, the system mapping time is slightly longer. To increase the sweep frequency range of the system, DDS devices with higher output frequencies can be used.

Experiments show that the system is stable and reliable, the printed amplitude-frequency characteristic curve is consistent with the curve measured by the traditional frequency sweeper, and the drawn frequency characteristic diagram is consistent with the theory. The operation and use of the software and the processing of graphic data are very convenient, and the use of the whole instrument is very simple, which is incomparable with the analog frequency sweeper.

1 Introduction

Frequency characteristics are the response characteristics of a system (or component) to sinusoidal input signals of different frequencies. As shown in Figure 1, the input of the system under test is a sinusoidal signal with an amplitude of Ar and an angular frequency of ω. If the system is linear, its steady-state output is also a sinusoidal signal with a constant frequency of ω and an amplitude of Ac. The angular difference is φ. Changing ω can get a series of input and output data. The output-to-input amplitude ratio A(ω)=Ac/Ar and the relationship curve of ω is called the amplitude-frequency characteristic of the system, and usually 20 lg A(ω) is called the logarithmic amplitude-frequency characteristic. The relationship between the output-to-input phase angle difference φ(ω) and ω is called the phase-frequency characteristic of the system. The combination of amplitude-frequency characteristics and phase-frequency characteristics is called frequency characteristics, and the commonly used open-loop frequency characteristics of the system are Bode plots.

The frequency characteristic of a system can be determined by a frequency characteristic tester. Frequency characteristic tester, also called frequency sweeper, is used to test the amplitude-frequency characteristic of the network under test. It can measure the resonant frequency, bandwidth, out-of-band attenuation, gain, etc. of the network under test, and is one of the commonly used devices in the field of electronics. The analog frequency sweeper is more expensive, and cannot directly obtain the phase-frequency characteristics, let alone save the frequency characteristic diagram and print the frequency characteristic diagram, which brings a lot of inconvenience to the user. Therefore, this digital frequency characteristic tester is not included. .

2. Overall design

The single-chip microcomputer controls the signal source to generate a standard sine wave, which is input to the network under test; the output of the network under test is input to the amplitude detection circuit and the phase detection circuit respectively, and the peak value and phase difference value are obtained and sent to the single-chip microcomputer for processing; the results of the single-chip processing are provided on the one hand. Real-time display to the LED, on the other hand, it is stored in the memory for the oscilloscope to display the amplitude-frequency and phase-frequency curves. The overall frame is shown in Figure 2.

2.1 Design of frequency sweep signal source

The frequency sweep signal generator is the core of the frequency characteristic tester. It provides a sinusoidal signal whose frequency changes periodically within a certain range over time for the input of the network under test. The methods of frequency sweep signal generation include phase-locked loop (PLL) and preset frequency divider, monolithic integrated waveform generator, special frequency synthesis device and direct digital frequency synthesis (DDS) circuit. The system is controlled by single chip microcomputer, uses EDA technology, and selects the system programmable logic device ispCPLD chip to form a direct digital frequency synthesizer (DDS) to generate scanning sine waves.

Direct Digital Frequency Synthesis (DDS) is a purely digital method. Because DDS has ultra-high-speed frequency conversion time, extremely high frequency resolution and low phase noise, DDS devices can maintain phase continuity during frequency change and frequency modulation, so it is easy to achieve frequency, phase and amplitude modulation. In addition, DDS also has the outstanding advantage of programmable control. DDS is mainly composed of phase accumulator, sinusoidal ROM table and digital-to-analog converter, etc. Its core is the phase accumulator, which is composed of an N-bit word-length binary adder and an N-bit register with clock fclk sampling. Linearly accumulate the frequency control word. When the phase increment is 1 and the word width of the accumulator is 32 bits, the phase resolution of the output address corresponding to the waveform is l/232. A sine function look-up table is stored in the sine ROM table, which outputs different amplitude codes corresponding to different instantaneous phase codes. When working, write the control word into the phase accumulator and convert it into an instantaneous phase. Under the action of the external reference clock, the phase accumulator accumulates the phase step once per clock cycle, and the corresponding amplitude code is output to the digital-to-analog converter. (D/A), the digital quantity is converted into an analog quantity, and then the final required signal is obtained after smoothing through a low-pass filter. And the analog sine wave is compared with a threshold voltage to obtain a square wave clock signal of the same frequency. He stores the amplitude digital quantity of the discrete sample points of the required sine wave in one cycle into the ROM, and then presses a certain address interval ( Phase increment) is read out, and an analog sinusoidal signal is formed by a D/A converter, and then a sinusoidal signal with better quality is obtained by a low-pass filter.

The frequency f0 of the output waveform of the signal generator is defined as:

Where fc is the crystal frequency, k is the frequency division ratio, N is the number of bits of the phase accumulator, and M is the increment (step size) of the phase accumulator.
In this design, take fc=32.768 MHz, k=50, N=16, and substitute it into the above formula to get:

In this way, as long as the value of M is controlled, the requirement of frequency step of 10Hz can be accurately realized. Here the clock frequency is:

In the formula, △phase is the frequency control word, sysclk is the system clock, clkin is the input reference clock frequency of the DDS, N is the number of bits in the frequency register, and M is the number of bits in the phase offset register. The frequency control word △phase determines the frequency value of the output signal; the minimum frequency resolution is determined by the number of bits N in the frequency register, the larger the N, the higher the frequency resolution; the phase resolution is determined by the number of bits in the phase offset register, and the amplitude Resolution is determined by the precision of the D/A converter.

2.2 Amplitude-frequency and phase-frequency characteristic design

The amplitude-frequency characteristic test circuit is composed of a peak detector and a D/A converter. The peak detector consists of an “op amp” and a detector diode. As shown in Figure 3. He detected the peak value of the output signal of the network under test (representing the network amplitude-frequency law), sent it to the 8-bit ADC0809 analog-to-digital converter, and then sent it to the single-chip AT89C51 for processing after digitization.

The commonly used detection methods in the amplitude-frequency characteristic test are peak detection and RMS detection. However, since the RMS detection cannot meet the frequency variation range of 500 Hz to 10 kHz as required by the design, peak detection is used. The active peak detector is used to realize the peak value measurement. The peak detector detects the peak value of the input and output signals of the network under test, and then sends it to the A/D converter to complete the quantization. In fact, since the characteristics of the D/A and low-pass filter of the signal source can ensure that the amplitude remains unchanged in the range of 100 Hz to 100 kHz, one peak detector and A/D can be omitted, and only the The output signal of the network under test.

The phase-frequency characteristic test circuit (the block diagram is shown in Figure 4) consists of two zero-crossing comparators, a phase detector, a low-pass filter and an A/D converter. The two comparators are zero-crossing signal comparators composed of “op amps”, which respectively convert the input and output sinusoidal signals of the network under test into digital signals.

The phase detector is realized by ETESTER. The phase difference signal of the input and output signals of the network under test is detected by phase detection, and the phase shift signal of the network under test is obtained after filtering by a low-pass filter, which is sent to ADC0809 for analog-to-digital conversion into digital quantity, and then sent to the microcontroller for processing. The duty cycle of the pulse signal output by the phase detector is proportional to the phase difference between the two signals, namely:

Phase difference=N1/(N1+N2)×360°

Among them, N1 is the count value within the high-level pulse width time, and N2 is the count value within the low-level pulse width time. After two clock signals PA and PB with the same frequency and different phases pass through the phase detector epd, one pulse waveform with different duty ratios will be output. Its frequency is the same as the input frequency, and the duty cycle is related to the timing of the rising edge of the PA and PB signals. The pulse width of epd is equal to the time difference between the rising edges of the PB and PA signals. This time difference is PB, which is exactly equal to the duty cycle of epd multiplied by 360°.

2.3 Display and printing of frequency characteristics

There are two display modes in the design of the frequency characteristic tester, one is to display the numerical value by LED, which can be printed out; the other is to display the frequency characteristic curve with an oscilloscope. The printing method we refer to is to design an RS 232 serial port in the system, use the serial port function of the MCU to communicate with the single-chip AT89C51, and use the printing control function of the PC to complete the printing.

A general oscilloscope inputs an analog voltage signal, that is, the measured amplitude-frequency characteristic and phase-frequency characteristic data are converted into analog voltage by D/A. Because the single-channel oscilloscope is used to display the amplitude-frequency and phase-frequency curves, the two curves can be displayed at different positions on the screen in time division. In order to facilitate observation, when the output amplitude-frequency characteristic data is displayed on the top of the screen, a positive voltage can be superimposed on the output of D/A. Due to the fast scanning speed of the oscilloscope, the two curves of phase-frequency and amplitude-frequency appear to be displayed at the same time. on the screen.

3. Conclusion

The volume of the system is small, because the single-chip microcomputer selected is AT89C51, and the program of the single-chip microcomputer system is short, so there is no need to expand EPROM and RAM. In addition, since the DDS integrated circuit is used to generate the frequency sweep signal, the quality of the frequency sweep signal is high and the frequency sweep range is wide. However, because the system uses the point-frequency method to measure the frequency characteristics of the network, the system mapping time is slightly longer. To increase the sweep frequency range of the system, DDS devices with higher output frequencies can be used.

Experiments show that the system is stable and reliable, the printed amplitude-frequency characteristic curve is consistent with the curve measured by the traditional frequency sweeper, and the drawn frequency characteristic diagram is consistent with the theory. The operation and use of the software and the processing of graphic data are very convenient, and the use of the whole instrument is very simple, which is incomparable with the analog frequency sweeper.

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