The Zebra neural network accelerator can be combined with ARM CPUs and GPUs, and video decoders on Xilinx multiprocessor systems on chips (MPSoCs) to deliver complex processing.
Zebra FPGA IP uses only a part of the FPGA, offering a high density of computation, and enabling designers to integrate their own functions and fully use ARM CPUs/GPUs.
Zebra FPGA IP is based on the core technology of Mipsology’s flagship Zebra software. It takes TensorFlow, PyTorch or ONNX CNN models and maps them to the target system.
As Zebra can process many kinds of neural networks, the application can continue to evolve without the need to reprogramme the FPGA at a low level.
Zebra IP helps partners expedite the development of neural network-based solutions for the embedded computing market.
The combination of Zebra FPGA IP and the ability to program FPGAs at the hardware level provides a malleable platform for machine learning-based systems at the edge.
Zebra FPGA IP can power smart systems that use cameras to collect information. When paired with video decoders and ARM CPUs on an FPGA, Zebra FPGA IP can perform complex processing without causing latency.
This FPGA product fits in cameras, set-top boxes, mobile systems, boxes installed in streets, and all other compact formats.
To learn more about Zebra IP, contact zebra@mipsology.com.