Intended for body control, S32K3 family includes single, dual and lockstep M7 core configurations supporting ASIL B/D safety applications, as well as a hardware security engine with the company’s own firmware, and support for firmware over-the-air updates (zero down-time and roll-back) – see the features chart at the bottom of the page.
Clocking is at 120 to 240MHz and flash ranges across 512kbyte to 8Mbyte. Interfaces include CAN FD, FlexIO, QSPI, Ethernet and serial audio. AEC-Q100 qualification is Grade 1 (-40 to +125°C) or Grade 2 (-40 to +105°C). The hardware security engine can handle AES-128/192/256, RSA and ECC encryption, aimed at ISO 21434 automotive security.
Applications are foreseen in seats pumps, actuators, access, steering and lighting in fuel and electric vehicles, as well as in electric vehicle battery management.
The ISO 26262 compliant real-time drivers (both for Autosar and non-autosar) are provided in a package with the hardware. “The inclusion of the production license in the silicon price broadens Autosar access for mass market developers,” according to NXP. The drivers provide “software portability across the entire S32K portfolio from 128kbyte to 8Mbyte and 32pin to 289pin. The use of a common code base and software API helps maximise software reuse across processor platforms”.
It includes:
- High-level interface for Autosar, low-level interface for non-Autosar
- ISO 26262 safety compliance up to ASIL D
- Autosar 4.4 including multi-core and security support
- IP coverage via Autosar standard and complex device drivers
- Configurable using NXP’s S32 configuration tool or Autosar partner toolchains
The firmware for the hardware security engine mentioned above is also complimentary, as is an ‘inter-platform communication framework’ – middleware for managing communication and resources in multi-core systems.
A ‘safety software framework’ with safety libraries for fault detection and reaction mechanisms is available under license, providing a foundation for ISO 26262 compliance.
S32K3 samples, evaluation boards and developer resources are scheduled to be available from early November :
| S32K3 part | features | package | Availability plan |
| K344/24/14 | Lock-step/dual/single Cortex-M7 ASIL D/B 4Mbyte flash HSE, CAN FD, Ethernet, OTA |
257 MAPBGA 172 MaxQFP 16 x 16mm |
Sampling now Production 4th quarter 2021 |
| K312 | Single Cortex-M7 ASIL B 2Mbyte flash HSE, CAN FD, Ethernet, OTA |
172 MaxQFP 100 MaxQFP 10 x 10mm |
Sampling now Production 2nd quarter 2022 |
| K342/41/22 | Lock-step/dual Cortex-M7 ASIL D/B, 2/1/2Mbyte flash HSE, CAN FD, Ethernet, OTA |
172 MaxQFP 100 MaxQFP 10 x 10mm |
Sampling 1st quarter 2022 Production 4th quarter 2022 |
MaxQFP combines gull-wing QFP and J-lead PLCC.
Also on the road map are the triple core K33 family and K35 ‘lock-step plus single’ family, both 240MHz and 8Mbyte in 172 MaxQFP and 289pin.
S32K3 family feature planning
The S32K3 product page is here. As the data sheets needs a sign-in, this brochure is a pretty good source of family information