QuickLogic announces eFPGA IP on UMC 22nm process

Update: July 2, 2023

QuickLogic announces eFPGA IP on UMC 22nm process

QuickLogic has announced the availability of its first customer-defined eFPGA block from the Australis IP Generator for the UMC 22nm process.

The Australis tool enables rapid eFPGA IP generation for nearly any foundry and node and the eFPGA IP core is available now, and any future customisations of it for companies using this same foundry/process node combination will be able to be completed in just a matter of weeks.

QuickLogic is a developer of ultra-low power multi-core voice-enabled SoCs, embedded FPGA IP, and Endpoint AI solutions and this new eFPGA IP will be integrated into SoC designs and supported by the complete QuickLogic Aurora software tool suite as well as a wide range of open-source tools.

By integrating an embedded FPGA IP, customers will be able to gain the flexibility to make RTL design changes post-production which will enable a single SoC to serve multiple, adjacent applications, or to evolve with changing standards, while also allowing for the addition of new features to address any competitive changes.

As a result, the useful product life of high-investment SoCs can be dramatically extended, increasing profitability and product ROI. Particular benefits are expected for smart IoT, industrial, security, aerospace, healthcare, and high reliability markets.

“Historically, customers interested in adding embedded FPGA IP to their SoC designs have had a very limited selection of array sizes and foundry/process node combinations,” explained Brian Faith, QuickLogic’s chief executive officer. “With capabilities enabled by our Australis tool, we have solved this challenge. Now we can customise the eFPGA IP, choose the specific process/node, and complete our customers’ designs in a very short period.”