SureCore, the low power embedded SRAM specialist, has announced the successful tape out of an IC developed under the InnovateUK- funded project “Development of CryoCMOS to Enable the Next Generation of Scalable Quantum Computers”.
This is a chip that will validate the cryogenic SPICE models and IP developed in the project that will be used for control and measurement ASICs to be housed within the cryostat along with the qubits.
Moving the control electronics from outside the cryostat to within it is needed to reduce latency and cabling but means that the electronics has to operate at unprecedented low temperatures of down to 4 Kelvin, which is the purpose of the project.
Paul Wells, sureCore’s CEO, said “This is the culmination of great teamwork by the consortium members who have all made invaluable contributions to this control chip design. Their cryogenic IPs have been successfully integrated by a very capable, physical design team at Agile Analog.”
Barry Paterson, Agile Analog’s CEO, added, “We are delighted to be involved in this project and gain the experience and knowledge of silicon performance at these extremely challenging cryogenic temperatures. This experience will enable future IP developments in the Quantum space.”
The plot shows the various IP blocks. A DAC from the University of Glasgow, a DAC from Universal Quantum and sureCore’s PLL, ROM block, Register File Block and SRAM Block. The remaining purple area is mainly control logic.
Wells added, “This is a great example of how InnovateUK bring teams of experts together to create innovation that would not be possible otherwise. This project will enable the UK to be seen as a centre of excellence not only for Quantum Computing but also for cryogenic transistor modelling as well as cryogenic IP and chip design. By working as a focused, expert team, the project has been able to successfully meet critical milestones and deadlines in a timely and efficient manner. This would not have been possible without the support of InnovateUK.”